Agile Analog has recently signed its first licensee in China.
“We opened our APAC regional sales and engineering office in January this year,” said Barry Paterson, Agile Analog’s CEO. “We thought that there would be a big demand for our unique analog IP solutions in the Asia-Pacific region and so we are delighted to have signed our first license for the region in just a couple of months. Key to the deal is us having local support for the customer to provide immediate answers to any engineering questions.”
“Having these in a ready-to-use, drop-in form that exactly meets the required specifications enabled the customer to shorten the time to market compared to alternative solutions, which have to be custom made,” added Lisa Yang, who heads up the APAC operations. “Our ability to shorten product development times makes a huge difference in today’s competitive market, particularly in China where the competition with rivals is fierce. BOM costs is another area where we help customers as we can bring analog functions, which are normally handled by discrete components, onto the ASIC to save costs.”
The customer will be using a set of Agile Analog IP in its new SSD Controller chip. This includes Bandgap Voltage Reference, Power On Reset, Digital Temperature Sensor and IR-Drop Detector.
Traditionally, analog IP blocks have to be manually redesigned for each application and process technology but Agile Analog has a unique way to automatically generate analog IP to exactly meet the customer’s specifications and process technology.
Called Composa, it uses tried and tested analog IP circuits that are in the company’s Composa library.
Effectively, the design-once-and-re-use-many-times model of digital IP now applies to analog IP for the first time.
As the analog IP circuits in the Composa library have been extensively tested and used in previous designs, and are fully validated every time they are generated, this gives a similar level of reassurance to the digital IP world’s ‘silicon-proven’.