The need for higher power density in today’s electronic systems combined with higher overall efficiency has driven many changes in the Non-isolated Point-of-Load Regulator (niPOL). In an effort to improve overall system efficiency, designers are opting to avoid multiple conversion stages to get to the regulated point-of-load voltage they need. This means that the niPOL is operated at higher input voltages with higher conversion ratios than ever before. Despite this fact, the niPOL is expected to maintain the highest efficiency and still continue to shrink the total size of the power solution. There is also the added expectation that with all other performance increases that power demand from the niPOL also further increases.
The power industry has responded to this challenge by introducing many technological upgrades to the niPOL. Over the past few years, the industry has seen significant improvements in device packaging, silicon integration and MOSFET technology, yielding highly integrated, compact solutions. While these solutions work well over a narrow voltage range, the efficiency and throughput power tend to drop slightly at modest step-down ratios of 10:1 or 12:1 and fall off dramatically when they are subjected to a wide input range that can be higher, with a step-ratio approaching 36:1.
Of all the changes applied to the niPOL in the past few years, the least amount of change has been the power train topology itself. Clearly, we have seen countless control topologies like current mode control, simulated current-mode control, digital control, etc. and power train improvements like synchronous rectification and adaptive drivers. These technologies have resulted in either incremental improvements and/or additional design complexities.
The hard switched buck regulator topology itself greatly limits improvements in the power density and throughput in a wide dynamic operating range. In order to reduce the size of a power system, you must reduce the size of its critical components. The best way to achieve this is to increase the switching frequency. Therein lies the difficulty. Increasing the switching frequency with a hard switched topology is like increasing the size of a leaky dam. There are basically three fundamental challenges: