Lattice Semiconductor has released the MachXO3D FPGA for securing systems against a variety of threats.
Unsecured systems can lead to data and design theft, product cloning and overbuilding, and device tampering or hijacking. With MachXO3D, OEMs can simplify the implementation of robust, comprehensive and flexible hardware-based security for all system components. MachXO3D can protect, detect and recover itself and other components from unauthorized firmware access at every stage of a system’s lifecycle, from the point of manufacturing all the way to the system’s end of life.
When used to implement system control functions, MachXO3 FPGA devices are typically the “first-on/last-off” component on circuit boards. By integrating security and system control functions, the MachXO3D becomes the first link in a chain of trust that protects entire systems.
“With MachXO3D, Lattice is enhancing the device configuration and programming steps in the manufacturing process. These enhancements, in combination with MachXO3D’s security features, protect systems by securing communication between the MachXO3D and legitimate firmware providers. This protection stays in effect throughout the component’s entire lifecycle, including system manufacture, transit, installation, operation and decommissioning, “ said the company
Gordon Hands, Director of Solutions Marketing, Lattice Semiconductor, commented, “With MachXO3D, we took care to retain that flexibility while adding a secure configuration block to deliver the industry’s first control-oriented FPGA compliant with NIST’s Platform Firmware Resilience specification.”
The Key features of the new MachXO3D include:
- Control function FPGA that provides 4K and 9K look-up tables for implementing logic that instantly configures at power up from on-device flash memory
- On-device regulator for a single 2.5/3.3-volt power supply operation
- Support for up to 2700 Kbits of user Flash memory and up to 430 Kbits sysMEM embedded block RAM to provide more flexible design options
- Up to 383 I/Os, configurable to support LVCMOS 3.3 to 1.0, and designed to integrate into a wide variety of system environments with features such as hot-socketing, default pull-down, input hysteresis, and programmable slew rate
- Embedded security block that provides pre-verified hardware support for cryptographic functions such as ECC, AES, SHA, PKC and Unique Secure ID
- Embedded secure configuration engine to ensure only FPGA configurations from a trusted source can be installed
- Dual on-device configuration memories to enable fail-safe reprogramming of component firmware in the event of a compromise
Samples are available.
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