The myth of Moore’s law arguably gets an established dissension as Semiconductor Industry Association (SIA) recent report reckons a dramatic end for transistors by 2021. With the given drive of digital transformation, emerging demand of computing and cloud may further justify the statements.
According to the International Technology Roadmap for Semiconductors (ITRS), recently released by the SIA, defines 2021 will be the year that it will no longer be feasible to continue shrinking transistors for use in microprocessors.
The SIA said that even if it is physically possible for chip makers to cram in a few more transistors, it will probably not be financially practical because of the huge costs of manufacture.
The roadmap runs until 2030, and is described by SIA president and CEO John Neuffer as the “final instalment”.
Though, this will not end the ongoing or prognosticated innovations in the transistor sector. According to the report, chip makers will begin to experiment with new transistor designs, vertical geometries, and 3D structures.
In terms of the move toward 3D structures, Hanselman said the same thing happened with memory devices in the 1980s. Manufacturers ran out of geometries and processing space on a wafer, so they started to build 3D structures. Now, we are going through the same transition with transistor structures.
Hanselman said he believes there’s a bigger question to ask: “What are we doing with this kind of computing power?”
Fitting more transistors on a wafer is a useful measure, he said, but we need to better understand how we are designing the systems that are leveraging those transistors. After 2021, we may no longer be able to increase the number of transistors on a particular die, but the cost will continue to drop, which may be an even bigger catalyst.
“As we look toward technologies like the Internet of Things and various means of dispersed computing, we now start to make it very inexpensive to put an awful lot of processing horsepower into all sorts of things that, today, are cost prohibitive,” Hanselman said. “And that, I think, is probably the larger revolution that continues, even though we may taper off the advances that Moore’s Law has afforded us for so long.”
At the same time, the rise of mobile has placed the emphasis squarely on reducing power consumption, and chip makers have increasingly struggled to shrink their integrated circuits – from 28nm to 14nm and, soon, to 10nm. The practical limit in terms of integrated circuits will be reached at around 6nm, if that is financially practical to achieve.
“Geometrical scaling characterised the 1970s, 1980s and 1990s. This was the first generation of transistor scaling. Major material and structural limitations were identified in the mid-90s, and the research community initiated the foundation of a new scaling approach that was heralded by the International Technology Roadmap for Semiconductors in 1998. This was named Equivalent Scaling,” said the report.