Mouser Electronics announces to exclusively ship the LMK03318 ultra-low-noise PLLatinum clock generator from Texas Instruments (TI).
The LMK03318 device provides:
- Ultra-low jitter of 100 femtoseconds (fs) and flexible, unique pin control options.
- Compared to conventional reference clock solutions, the new clock generator’s jitter performance enables system designers to optimize system timing margins and bit error rate (BER) to reduce data transmission errors allowing for more reliable communications, networking, server, computing, and high-performance industrial
Exclusive at Mouser the new TI’s LMK03318 clock generator delivers:
- A high-performance PLLatinum fractional-N phase-locked loop (PLLs) with eight outputs to enable ultra-low jitter performance of 100 fs root mean square (RMS) over multiple integration bandwidths (1 KHz–5 MHz and 12 KHz–20 MHz).
- Designers can take advantage of the ultra-low jitter to improve their system BER and increase the reliability of their telecommunications infrastructure equipment.
- A unique pin-mode control feature enables designers to easily select from 71 pre-programmed frequency startup plans compared to one-time programmable memory available in other solutions.
- Integrated electrically erasable programmable read-only memory (EEPROM) enables easy customization, while the I2C interface gives system designers complete control of device configuration.
Additionally, the LMK03318 device is supported by the LMK03318EVM evaluation module, which can be used as a flexible, multiple-output clock source for compliance testing, performance evaluation, and initial system prototyping.
The edge-launch SMA ports provide access to the LMK03318 clock inputs and outputs for interfacing to test equipment and reference boards, enabling integrated system-level testing between TI’s LMK03318 and third-party FPGA/ASIC/SoC reference boards.