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New Alliance Memory Unveils High-Speed CMOS PSRAMs

Devices from Alliance Memory Provide Cost-Effective, Easy-to-Use Solutions for High-Bandwidth, Low-Power Applications

alliance memeory

Alliance Memory unveils a new family of high-speed CMOS pseudo SRAMs (PSRAMs).  The new high-speed CMOS pseudo SRAMs (PSRAMs) comes with densities from 8Mb to 128Mb in 6.0 mm x 7.0 mm x 1.0 mm 48-ball FPBGA and 4.0 mm by 4.0 mm by 1.0 mm 49-ball FPBGA packages.

Featuring high-density DRAM cores with SRAM interfaces and on-chip refresh circuits for refresh-free operation, the devices provide:

  • High bandwidth and the low power necessary to replace SRAMs in portable electronics such as mobile phones and PDAs, or to serve as companion chips to burst NOR Flash applications.
  • The interfaces of the AS1C1M16PL-70BIN, AS1C1M16P-70BIN, AS1C2M16P-70BIN, AS1C512K16PL-70BIN, and AS1C512K16P-70BIN are compatible with asynchronous type SRAMs.
  • The AS1C4M16PL-70BIN and AS1C8M16PL-70BIN CellularRAM PSRAMs feature a multiplexed address/data bus for greater bandwidth.
  • The devices support asynchronous and burst operation, and feature read or writes burst lengths of 4, 8, 16, or 32 words, or continuous burst.
  • Available in industrial temperature ranges, the PSRAMs offer fast access speeds of 70s and operate from a single power supply of 1.7V to 1.95V or 2.6V to 3.3V.

Device Specification Table:

Part numberDensityOrganizationVCC Range (V)Temp. (°C)Package
AS1C512K16PL-70BIN8Mb512K x 161.7 to 1.95-30 to +8548-ball FPBGA
AS1C512K16P-70BIN8Mb512K x 162.6 to 3.3-30 to +8548-ball FPBGA
AS1C1M16PL-70BIN16Mb1M x 161.7 to 1.95-40 to +8548-ball FPBGA
AS1C1M16P-70BIN16Mb1M x 162.6 to 3.3-40 to +8548-ball FPBGA
AS1C2M16P-70BIN32Mb2M x 162.6 to 3.3-40 to +8548-ball FPBGA
AS1C4M16PL-70BIN64Mb4M x 161.7 to 1.95-30 to +8549-ball FPBGA
AS1C8M16PL-70BIN128Mb8M x 161.7 to 1.95-30 to +8549-ball FPBGA

Additional power-saving features include auto temperature-compensated self-refresh (ATCSR), partial array self-refresh (PASR), and a deep power down (DPD) mode.


The devices combine the most desirable features of SRAMs and DRAMs to provide designers with easy-to-use, low-power, and cost-effective memory solutions for wireless, automotive, networking, and industrial applications.

Samples and production quantities of the new PSRAMs will be available in November 2018, with lead times of eight weeks.

Further info: Click here


Niloy Banerjee

A generic movie-buff, passionate and professional with print journalism, serving editorial verticals on Technical and B2B segments, crude rover and writer on business happenings, spare time playing physical and digital forms of games; a love with philosophy is perennial as trying to archive pebbles from the ocean of literature. Lastly, a connoisseur in making and eating palatable cuisines.

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