element14 has extended its range of single-board computer (SBC) development kits with the addition of the OrangeCrab r0.2 open-source FPGA development board from the Good Stuff Department.
The OrangeCrab expertly combines the ultra-compact Adafruit Feather form factor that electronic designers love with the high power normally associated with much larger Field-Programmable Gate Arrays (FPGA) development boards.
Romain Soreau, Head of SBC at Farnell and element14, said: “The ultra-compact, feature-packed and versatile OrangeCrab open-source FPGA development board is a great addition to our extensive portfolio of SBC development boards and evaluation kits. The OrangeCrab is a skillfully designed and versatile board that can be used for a range of professional applications – or by hobbyists with a keen interest in FPGA hardware.”
The OrangeCrab is based on the Lattice EPC5 FPGA and features two memory configurations including the ECP5 25F/128Mbit and ECP5 85F/521Mbit.
The FPGA is compatible with an open-source toolchain and perfect for experimenting with RISC-V and other softcore SoCs. The variety of peripherals built into the OrangeCrab makes it suitable for many real-world applications.
Users can port over CircuitPython to the OrangeCrab which is more than capable of hosting the interpreter. While not currently implemented, developers are free to target the FPGA itself with gateware synthesized HDL.
Key features of OrangeCrab r0.2 FPGA development board include:
- Processor: A Lattice Semiconductor EPC5 FPGA with 24K LUT elements, 10-pin FPGA programming header and MicroSD socket with full-speed direct USB connection to FPGA.
- Memory: Memory options include up to 8Gbit DDR3 onboard system memory (x16) and storage 128 or 512Mbit QSPI flash memory. A μSD card slot increases the development board’s storage potential.
- Form factor: The OrangeCrab follows the slim feather board specification from Adafruit with dimensions of just 22.86mm x 50.8mm. It is small enough to be carried in a pocket while functioning as a full prototyping ground for custom SoC designs.
- Connectivity: The open-source USB bootloader enables users to connect over the FPGA’s native USB interface to upload code and access the memories over MSD. The standard 2×5, 1.27mm header is a great addition for those looking to develop applications on the USB layer.
- Power: Offering high-efficiency DCDC for main supplies, a battery charger chip (100mA), a LiPo battery connector (PH type) and a 48MHz oscillator.