Renesas Electronics has released R-Car V4H system on chip (SoC) for central processing in advanced driver-assistance (ADAS) and automated driving (AD) solutions.
The R-Car V4H achieves deep learning performance of up to 34 TOPS (Tera Operations Per Second), enabling high-speed image recognition and processing of surrounding objects by automotive cameras, radar, and lidar.
“We have seen excellent customer response to our R-Car V3H and V3M with high volume production, and we are pleased to extend our offering with the R-Car V4H,” said Naoki Yoshida, Vice President, Automotive Digital Products Marketing Division at Renesas. “As Renesas expands its scalable R-Car portfolio, we expect to see cutting-edge ADAS adopted in all vehicle types, from mid-range to entry-level.”
The R-Car V4H enables market-leading performance per watt through a careful combination of best-in-class IP and expert HW optimization. It targets the highest volume zones of automated driving: Level 2+ and Level 3.
Thanks to a high level of integration, the R-Car V4H allows customers to develop cost-competitive, single-chip, ADAS electric control units (ECUs). These control units may support driving systems appropriate for automated driving Levels 2+ and Level 3, including full NCAP 2025 features.
The R-Car V4H also supports surround view and automatic parking functions with impressive 3D visualization effects such as realistic rendering.
Regarding ISO 26262 functional safety, the SoC development process targets ASIL D systematic capability for all safety-relevant IPs. The signal processing portion of the R-Car V4H is expected to achieve ASIL B and D metrics for the real-time domain.
Furthermore, Renesas provides a dedicated power solution for R-Car V4H based around the RAA271041 pre-regulator and the RAA271005 PMIC. This enables a highly reliable power supply for the R-Car V4H and peripheral memories from the 12V supply of the vehicle battery.
These features enable low power operation while targeting ASIL D compliance for systematic and random hardware faults at a very low BOM cost.
This helps to minimize the effort of hardware and software development while reducing design complexity, cost, and time to market.