Codasip has collaborated with Intel® to enable undergraduate and graduate level courses to benefit from faster, simplified architectural exploration combining Codasip RISC-V IP cores, the Codasip Studio development environment, and Intel’s FPGA platforms.
Intel is scaling up the ecosystem around its Intel® Pathfinder for RISC-V* program. Part of this is a new focus on education. Codasip’s University Program was launched in March of 2022 and already has several universities worldwide using its curriculum, providing universities with access to Codasip Studio and project-based RISC-V assignments.
Intel® Pathfinder for RISC-V provides a common environment for accessing RISC-V and peripheral IP for its FPGA boards, enabling architectural exploration and exploration of different configurations and combinations of IP. Starting in the fall of 2023, Codasip’s University program will take advantage of Intel Pathfinder for RISC-V qualified FPGA development boards that are optimal for graduate System-On-Chip curriculum assignments requiring greater capabilities, as well as undergraduate High-Level Synthesis (HLS) & Verilog curriculum assignments requiring lower price points.
Keith Graham, Vice President of University and Customer Experience Program, Codasip, said, “The addition of Intel’s FPGA platforms into Codasip’s computer architecture project-based assignments will further boost our three University Program Pillars; preparing the next generation of researchers, training the next generation of engineers, and developing solutions to solve tomorrow’s technological challenges.”
Vijay Krishnan, General Manager, RISC-V Ventures from Intel, commented: “Codasip has put together a program that comprehends the needs of universities worldwide. By extending our collaboration with Codasip to include the education segment, we hope to enable the next generation of RISC-V developers on an accelerated timeline.”