The Minister of State for Electronics and Information Technology, Rajeev Chandrasekhar has recently introduced Digital India RISC-V Microprocessor (DIR-V) Program with an overall aim to enable the creation of Microprocessors for the future in India, and for the world and achieve industry-grade silicon & Design wins by December’2023.
Rajeev Chandrasekhar mentioned that DIR-V will see partnerships between Startups, Academia & Multinationals, to make India not only a RISC-V Talent Hub for the World but also a supplier of RISC-V SoC (System on Chips) for Servers, Mobile devices, Automotive, IoT & Microcontrollers across the globe.
While recollecting his early days as x-86 processor chip designer at Intel, Rajeev Chandrasekhar mentioned that many new processor architectures have gone through an initial period of ferment characterized by waves of innovations. At some point, however, they all settled on a dominant design. ARM and x-86 are two such instruction set architectures- one of which is licensed and other is sold, where industry consolidated in earlier decades. However, RISC-V has emerged as a strong alternative to them in last decade, having no licensing encumbrances, enabling its adoption by one and all in the semiconductor industry, at different complexity levels for various design purposes.
Challenging the status quo, RISC-V Instruction Set Architecture (ISA) is not only witnessing a quantum leap and unprecedented levels of processor innovation owing to its free and open nature but also pushing the Moore’s Law beyond its limits. Today, there is a thriving ecosystem of chip designers at academia, scientific societies and startups in the country, contending to gain the market share in RISC-V growing market. While India has certainly taken several early steps in processor design area, the time is felicitous now to advocate India’s strides in RISC-V global community and unveil the Digital India RISC-V Processor roadmap to the world.