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SiFive and Open-Silicon Jointly Hosts Bangalore’s First RISC-V Tech Symposium

SiFive and Open-Silicon jointly hosted Bangalore’s first RISC-V Tech Symposium

Krishnakumar Ramamoorthi

SiFive and Open-Silicon jointly hosted Bangalore’s first RISC-V Tech Symposium. The event was attended by industry leaders and dignitaries such as, Krishnakumar Ramamoorthi, Sr. Staff Product Marketing, Microsemi, Vivek Tyagi, Director, Western Digital, Chandan Haldar, CEO, Morphing Machines, Kunal Ghosh, Director & Co-Founder, VSD and Anagha Ghosh, Business Head & Co-Founder, VSD along with Dr. Krste Asanovic, Chairman of RISC-V Foundation and Co-Founder and Chief Architect of SiFive, Mr. Sunil Shenoy, VP of Hardware Engineering, SiFive, Bhupesh Dasila, Engineering Manager, Open-Silicon and Shafy Eltoukhy, SVP and General Manager, Open-Silicon.

RISC-V, an open instruction set architecture is known to have stirred a revolution in the industry and is rapidly increasing its ecosystem. It is being preferred by leading system, chip design organizations, several start-ups and governments around the world.

The tech symposium in Bangalore enabled industry experts, students and engineers to share their thoughts on the future of RISC-V, Indian semiconductor industry, startups, AI and Deep Learning among others.

The esteemed speakers used the platform to discuss the nuances of standardization of RISC-V ISA for all computing devices. The speakers also provided impetus on AI as the next revolution in digital world, innovation for a data centric world, high bandwidth memory IP subsystem and RISC- V as a game changer for startups.

Announcement- Design Idea Contest 2018 (India only)

SiFive also announced first of its kind Design Contest in India. SiFive will collaborate with the best ideas and provide the winners’ access to custom CPU IP, design support, and help delivering working samples for the chip. The contest will run from 21st August till 30th November 2018.

“The semiconductor ecosystem has long been hindered by increasing costs, limited access to IP architectures and an inability to customize,” said Sunil Shenoy, VP of Hardware Engineering of SiFive. “RISC-V, as an open ISA and move to layered approach of SoC Design has the capacity to unleash a whole new era of hardware innovations because it democratizes access to all inventors, from major corporations, startups and research institutes to students and enthusiasts.”


Niloy Banerjee

A generic movie-buff, passionate and professional with print journalism, serving editorial verticals on Technical and B2B segments, crude rover and writer on business happenings, spare time playing physical and digital forms of games; a love with philosophy is perennial as trying to archive pebbles from the ocean of literature. Lastly, a connoisseur in making and eating palatable cuisines.

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