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Design for connectivity, reliability, and safety using the latest circuit protection technologies and board layout strategies

ElectrostaticThose of us who wear vision correction glasses are used to seeing the world through lenses. New technologies now allow a virtual world to be layered on top of the real world that we normally see. The lenses will become displays that allow us to see the “real” world that is augmented with overlaid information and images, creating an Augmented Reality (AR). An example would be the integration of navigation into the AR glasses to allow a user to walk through town with turn-byturn instructions (visual or verbal) to help them easily get to their destination. Other examples include facial recognition, fitness tracking/health-sensing, travel assistance, business news, first-person photos and videos (Figure 1).

Figure 1. Example statistical information visible using Augmented Reality (AR) glasses.

This article discusses advanced circuit protection solutions and board layout strategies that safeguard wearable devices and their users. Applying these recommendations early in the design process will help today’s circuit designers improve the performance, safety, and reliability of their wearable technology designs and help build a more reliable IoT ecosystem.

ESD Selection and Configuration Factors for TVS Diodes utilized in AR wearables 1. Increasingly Smaller Form Factors

Today’s ESD diodes offer a variety of performance benefits for AR applications led by a small form factor (Figure 2). To optimize their future circuit designs, design engineers should follow these recommendations for the selection and configuration of ESD diode technologies.

IC areas
Figure 2. Available IC areas, form factors, and circuit protection components continue to shrink in size as the sophisticated chipsets used in wearable devices get increasingly smaller.
SP3522 Series
Figure 3. The SP3522 Series lowcapacitance bidirectional discrete TVS diode arrays provide symmetrical ESD protection for high-speed data lines when AC signals are present. They are also designed for consumer electronics such as smartwatches, smartphones, tablets, eReaders, and fitness bands.

2. Choosing unidirectional or bidirectional ESD diodes

ESD diodes are available in both unidirectional or bidirectional configurations. Unidirectional diodes are used for DC circuits, including keypads, pushbuttons, and digital circuits. Bidirectional diodes are used in AC circuits, which may include any signal with a negative component greater than -0.7V. These circuits include analog video, audio, RF interfaces, and legacy data ports.

Where possible, electronics engineers should choose unidirectional diode configurations to improve performance during negative-voltage ESD strikes. During these strikes, the clamping voltage is based on the forward bias of the diode, which is usually less than 1.0V. During a negative strike that is based on the reverse breakdown voltage, a bidirectional diode configuration provides a clamping voltage that is higher than the forward bias of a unidirectional diode. Thus, the unidirectional configuration dramatically reduces the system stress experienced during negative transients.

Figure 4. The SP1020 from Littelfuse provides robust ESD protection in a very space efficient 01005 package making it ideal for applications like AR Glasses where board space is very limited.

3. Determine diode location

Board-level ESD diodes at each of the IC’s pins are not required in most circuits. Instead, the circuit’s designer should determine which pins might be exposed to user-generated ESD events that occur outside of the application. If the communications or control line can be touched by the user, it becomes a possible pathway for ESD to enter the integrated circuit. Typical circuits include buttons, switches, USB, audio, and other data buses. While incrementally adding these discrete devices, it is important to reduce the size to fit 0201 or 01005 outlines to avoid using too much board space. There are also space-saving multi-channel arrays available for many wearable applications. Place the ESD device as close to the ESD ingress point as possible, which is typically defined as the connector or the I/O.

4. Consider routing of “ESD” trace

To protect the IC’s pins with an ESD diode, there are several key considerations for trace routing—from I/O to ground. ESD, unlike lightning transients, does not unleash a large amount of current for a long duration of time. It is important to move the charge from the protected circuit to the ESD reference as quickly as possible to effectively handle ESD. The length of the trace are the overriding factors—from the I/O line to the ESD component and from the ESD component to ground— not the width of the trace to ground. Trace lengths should be kept as short as possible to limit parasitic inductance. This inductance results in inductive overshoot, which is a brief voltage spike that can reach hundreds of volts if the stub trace is too short. Recent package developments, include µDFN and Wafer Level Chip Scale Packages (WLCSP) utilize outlines that fit directly over the data lanes to completely eliminate the need for stub traces.

5. Understand HBM, Machine Model (MM) and Charged Device Model (CDM) definitions

HBM, MM, and CDM are test models for characterizing the ESD robustness of the integrated circuits that run the portable device or wearable, including the processor, memory, and ASIC. They are used by the semiconductor supplier to ensure the robustness of the circuits during manufacturing. The current trend is for suppliers to reduce the voltage test levels since it saves die space. Additionally, most electronics manufacturers not only provide for ESD protection, they have countermeasures in place during the assembly process.

If ESD protection is only becomes a consideration during assembly, then once the device reaches the consumer, the device is susceptible to ESD damage in the consumer’s environment. Without adequate ESD countermeasures built in, electronic devices will fail incrementally or catastrophically in the user’s environment. To guarantee fewer ESD related field failures and thus happy customers, electronics design engineers should select a board-level device that is robust enough to protect against intense electrical stresses yet offers the bandwidth and the electrical performance demanded by the end-user product. When evaluating ESD protection components, consider the following parameters:

  • Dynamic resistance: Defines the diode’s resistance to the change in state from blocker to conduit of electronic energy. This value represents how quickly the diode will clamp and divert the ESD transient pulse to ground. It helps define how efficiently the avalanche diode conducts the excess voltage and current to ground. The more vertical the I-V or TLP curve is, the more efficient the avalanche diode is, and the lower the expressed dynamic resistance.
  • IEC 61000-4-2 rating: Tested and confirmed during design and characterization, this rating reflects what the ESD diode is capable of withstanding repeatedly without degradation of the DC performance. Typically for this parameter, the higher the value, the better. A growing number of Littelfuse ESD diodes approach 20kV and 30kV under contact discharge conditions, which regularly exceeds industry standards for fielded electronics, nominally 8kV air discharge.
  • DC (Direct Current) Performance: When designing circuits that need protection, remember these important considerations:
  • Parasitic capacitance,
  • Parasitic inductance,
  • Surge tolerance (8/20us), and
  • Nominal and maximum leakage currents.

The approach will vary depending upon the performance characteristics of the interfaces being protected.

For additional information on ESD protection for wearable devices, download the ESD Suppression Design Guide and Wearables Protection Application Note, courtesy of Littelfuse, Inc.

This article was written by Todd Phillips, Global Market Manager, Electronic Business Unit, Littelfuse Inc., Chicago, IL.


BiS Team

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