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Trend of System-Level Integration in Designing SoC will Continue in the Future

Ambit Sengupta Avnet India
Sambit Sengupta, Senior Field Application Manager, Avnet India

The electronic devices today are architected through a SoC designs paradigm.  The success of system-on-chip (SoC) hinges upon a well-concerted integrated approach from multiple disciplines, such as device, design, and application. Further explaining the quiddity of SoC designs in modern electronics, Sambit Sengupta, Senior Field Application Manager, Avnet India demystifies the schematics of SoC designs complexities in literary legibility and also shares the scopes, advancements and challenges. Edited Nub.     

  1. Is rapid development of standards and pressure on power consumption and minimizing area remains a bottleneck for modern SoC designs?

The emergence of battery-operated System-on-Chip (SoC) in recent years increased the efforts to reduce the power consumption. Early works identified the need of minimizing the power consumption at the initial hardware/software codesign process. In today’s era, there is a crucial need for efficient power consumption simulation and estimation tools. The increased complexity of modern SoC applications limits the capabilities of such simulation tools to predict the exact measured power consumption.

We at Avnet focus on a modular approach to deliver innovation in developing modern SoC. Over the years, we have developed a robust offering of System-on-Modules (SoM) devices that are based on the leading programmable System-on-Chip (SoC) processors.

Avnet has developed various SoM modules inhouse as well as partner its embedded design house. Whether your technology requirement is on ARM or on X86 architecture or MPU or requires FPGA architecture, we have solutions for every segment. An online product selection guide (Click here) further helps customer to focus on their application development. SoC such as zync/ultrascale,, intel multi core devices design benefits from this approach.

  1. Is verifying complete system in a SoC design still a major challenge?

The electronic devices today are architected through a SoC design paradigm.  The success of system-on-chip (SoC) hinges upon a well-concerted integrated approach from multiple disciplines, such as device, design, and application. There are several challenges that one may face while integrating components on the chip. Firstly, there is a huge gap between what can be theoretically designed and what can be practically implemented. New requirements on performance, power consumption, and rapid design cycles necessitate that one revisits the fundamental design principles. For instance, one of the persistent challenges is how to deploy in concert an ever increasing number of transistors with acceptable power consumption.

Another challenge is that in order to meet the increasingly demanding requirements in multimedia applications, SoC must provide functional flexibility as well as processing capability. For new applications in Industrial IoT, rapid prototyping or in data crunching environments, verifying the complete system is challenging but it helps to have a concerted approach to design.

  1. What will mitigate the complex system design and timing closure problems of complex SoC designs?

 SoC design cycle requires detailed verification and it will be helpful if designers work on timing closures from very early in the design. For example, in any Xilinx SoC design- the customer has access to the world-class EDA tool, Vivado – which is provided by Xilinx. The inbuilt simulation tool helps in sorting problems very early in the design cycle. Here the old adage ‘prevention is better than cure’ is of paramount importance. At Avnet, we have a large team of technical experts/ field application engineers (FAEs) who can help in independent verification and validation of customer design on request. In some cases an independent verification and validation paid service may also help to accelerate the project.

  1. How complicated is SoC architecture in network design?

As SoCs continue to evolve to have more and more programmable elements and processors on them, the opportunity to tune the processors, interconnect and other blocks to match the intended application and gain advantages of performance and energy consumption is one that many designers are still not aware of.

The other challenge is around IP integration that has become pivotal in determining whether design teams of advanced system on chips (SoCs) meet their time to market and performance goals. The rapid growth in the number of available intellectual property (IP) blocks has both enabled and paralleled the increase in the size and complexity of SoCs.  One of the most difficult challenges in SoC network design is determining how to make sure the hardware and software work together at the SoC level. Hardware verification has advanced to the point where the verification of individual functional blocks in a design can be achieved with reasonable confidence using constrained code coverage, assertion coverage, and functional coverage. Challenges remain in making sure the blocks work correctly when placed in the context of the SoC. Whether in telecommunications or consumer electronics, network design using SoC requires loT of planning by designers. Engineers need to have modular design approach while doing network design, and always under time to market pressure. Avnet provides access to many IPs which can be integrated with existing SoC designs and hence resolve the time to market pressure. The plug and play IP are usually targeted to the choice of SoC and can be procured off the shelf.

  1. What disciplines SoC designers adapt to minimize the risk of design error?

 SoC designers need to be strong in verification and validation techniques. There are wide level of EDA tools or tools from SoC vendors available to help today’s engineers while doing SoC design. However deep understanding of timing issues, embedded design flow and strong verification and validation techniques stand in good stead for SoC designers.

  1. Design verification has always a highly expensive and time-consuming component of electronic system development? How System-on-Chip (SoC) architectures morphed verification?

The main challenge for SoC design today is that increased functionality is packed in each of the new chip available. Shrinking die size and better power management are enabling designers to have more advanced SoC, however, this comes with challenges of better techniques of verification. At every level – whether module, chip or system level- designers need to use tools to validate the design. Latest SoC architectures help in various ways by giving better tools and more predictive analysis for designers.

  1. How difficult is matching Security protocol in modern SoC designs?

SoCs or the systems developing them are prone to a wide range of security attacks. Security has become a critical consideration in the design cycle of every embedded SoC or system. The level of security in a SoC design is widely debated based on the critical nature of the applications and the associated cost-benefit risks tradeoffs. Some of the modern SoC always comes with various security inbuilt. Designers now have options to add on security by using secure elements. Avnet helps designers to learn more about the latest technologies to secure SoC by conducting regular workshops at customer sites.

  1. What is the future of SoC designs?

The trend of system-level integration in designing SoC will continue in the future and this will have a strong influence on the designer’s environment. Increasing technology capabilities will enable new qualities of system integration. The demand for advanced mobile applications and distributed intelligent sensor arrays will lead to an integration of RF components (to be realized in CMOS) into SoCs. SoC designs will have expanded roles to play in Artificial intelligence and robotics. In many new designs of sub components of smart city design and Industry 4.0, we see the start of SoC design. In critical telecom designs as well as complex RADAR designs, SoC are readily used.

  1. Are Indian companies capitalizing on the global demand for SoC design expertise?

Developing solutions that generate more sales has long been the mantra of India’s software sector. Global semiconductor companies and OEM manufacturers are beginning to outsource the development of even complex, ‘bleeding-edge’ technologies such as SoC to several Indian startups and established companies with design expertise. Indian companies are positioning themselves to benefit from the shift to mobile devices, multimedia, networking and broadband applications, all of which are driving demand for system-chip technology.

  1. How strong is your SoC design team in India?

 Avnet India is a technology solutions provider supporting its customers in their SoC design. Whether it is a design of RADAR or satellite, or a complex 5G RAN design or consumer electronics, we have deep trained professionals who can guide you in SoC designs.



Niloy Banerjee

A generic movie-buff, passionate and professional with print journalism, serving editorial verticals on Technical and B2B segments, crude rover and writer on business happenings, spare time playing physical and digital forms of games; a love with philosophy is perennial as trying to archive pebbles from the ocean of literature. Lastly, a connoisseur in making and eating palatable cuisines.

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