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Why Chip Security Should Be The Top Priority For Every System Developer

Sambit
Sambit Sengupta, Associate Director, SPM & FAE, Avnet India

In this data-centric world, the value of data is enormous it can be considered the currency of a new world order. There are various entry points to this ubiquitous entity known as ‘data’. The first gate is the chip and then it flows through various interconnect and software to the network or cloud. With multiple cyberattacks taking place each day, system developers are under immense pressure to prevent security breaches that could compromise valuable data. This in turn puts further strain on existing supply chains and cybersecurity stakeholders. Can we strengthen security at the entry points? While the answer is a resounding ‘yes’, we need to access the risks and benefits.

Chip level security is mandatory in the emerging end users/applications market that uses connected chips (mainly for edge computing) and artificial intelligence. However following Moore’s law, feature scaling and advanced nodes have made it very complicated to protect data on a chip. It becomes a challenge to implement complex security-based architecture inside the chip while doing optimum tradeoff between power, performance and utility of the chip.

Let us try to examine some visible and hidden factors affecting chip security.

A few years back, there were widespread reports of vulnerabilities in many mission critical systems known as Spectre and Meltdown.

This called for costly fixes to the sensitive data centers. Well known processor vendors had to cover the gaps in their software, but much of these bug fixes came at the cost of performance. Eventually, this resulted in adding more servers to process the same volume of data. System developers in large OEMs also started making their own chips to achieve better performance and power benefits. Some of them leveraged existing ARM cores or used RISC-V or FPGA architecture, which gave them more freedom to decide the security aspect of their designs.

System architects and developers in the past decade became aware of the modes of attacks and how to prevent them. The most basic attack takes place at the supply chain level, which can be mitigated by taking care of the size of physically unclonable function or building robust supply chains. The next common attack is reverse engineering. This risk can be eliminated by logic locking, roll back security feature but to do that we use extra circuitry, and this also affects the performance and size of the chip. Two other types of attacks are the Trojan attack and side channel attack. Mitigating these risks come at the cost of performance and power.

Security in chips has been the de-facto standard in some industries. It is most commonly found in aerospace and defense (A&D) applications, a pioneer in using chip level security. One problem which is less frequented in A&D is that most chips are used in standalone systems so malware infestation can be detected quickly and quarantined. Over the last few years, the automotive industry has also been exploring secured chips. As more and more vehicles become connected, the security in chips needs to evolve. In the near future, every autonomous vehicle will be required to connect to the cloud and security from the chip up will become the standard feature. Imagine driving a Tesla – there is a huge amount of data that is being passed from sensors to the vehicle control unit, data center and back to the vehicle. All of these must be traced and the entry point for any malware will be the chip.

Now that we have examined various attacks and segment based requirement of security at chip level, there still remains the question of economic consideration.

Every security solution including chip security has a cost and it boils down to the value of data that it enables to protect as well as the price elasticity of the device. System developers have to keep abreast of the latest breakthroughs and risk mitigation techniques. They need to act like a modern-day Sherlock Holmes, being always 2 steps ahead of the possible malware attacker or the modern-day Professor Moriarty. They need to understand the intent of their system attackers: are they after your data or do they plan to attack your entire system. However, we need to be mindful that no security measure is 100% malware proof. At best, we can delay the attacks and make the system so robust that the attacker loses patience and goes after some other system that is less fortified.

In securing the chips, system developers depend on chip manufacturers who can induce the delay in attacks by adversaries. Some best practices are well documented in a research paper by Microsoft – “The 7 properties of highly secured devices”. Examining each parameter by a system developer is very important and they should ask leading questions before a final decision is made on the platform or the entire system. Leading global technology distributor and solutions provider Avnet can help innovators by handholding them through each parameter so that they can choose the most optimum secured platform.

Malicious attacks on chips used to be confined to the safe environment of R&D labs, but with rising geopolitical tensions it is no longer a research topic. Sometimes non state actors have access to critical systems too. While these systems have become more commonplace, a well-trained attacker can induce malware in your chip and control every device in your network. Even seemingly standalone systems can be attacked if chip level security is not factored in. This is more common in edge nodes, and developers need to think ahead of time to secure these devices. These are complex semiconductors, costly and complicated to secure. Continued scaling of devices are making them more vulnerable. As an analogy, smartphones today are susceptible to more malware attacks than feature phones a decade ago. As chips move to the lower node and become more efficient, optical techniques become more advanced. With that it becomes difficult to safeguard the compact chip. With more gate counts in a chip, the amount of physical secretions become harder to mitigate. Many times under 10 nm- secure meshes are built into chips – optical interference does not allow you to see through it. But these risk mitigation techniques become harder as the chips become smaller and more efficient.

System developers have some tricks at their disposal. The best solution is to know the possible attackers. First, they identify and plan ahead for possible attacks. If it is a military system, developers may need to be wary of any enemy nation state, possibly having great R&D resources. Some system developers have to worry about attackers who are out there to damage their brand or a lone wolf prankster. Other times, it could be ransomware attacks. Solutions have to cater for the segment that chips are deployed for. Sometimes machine learning incorporated in chips can help too. However attackers can also use the same tools of ML to break through the defense. Another solution is to increase in-built resilience by incorporating a hardware IP which is designed for security. They can easily watermark these IP to have proper traceability with a unique id. System developers can work with world class supply chain partners like Avnet to achieve end-to-end secured solutions.

In conclusion, there is always a cost versus benefit component for system developers. While they may be able to think about a system without chip security in the past, with increasing risks due to the vulnerability of data and the value associated with it, system developers and chip makers are taking security very seriously and expect every stakeholder to do the same.

Security is now tightly integrated with system architecture and system design and cannot be wished away while thinking about economics. The potential threat to the brand is making the entire ecosystem take measures to secure designs from chip level.

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